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Vision Processors: Embedded Real-Time Processing
Frame Grabbers
Vision Processors
Teledyne DALSA vision processors feature powerful embedded processing architecture for real-time high-performance machine vision applications. Combining high-speed image acquisition capability with user programmable FPGAs (Field Programmable Gate Array) and graphical FPGA development tools, our vision processors deliver unmatched power and flexibility in real-time image processing on the PCIe platform.
When do I need a Vision Processor?
- When protecting your custom algorithm IP is paramount
- When you need real-time, deterministic response
- When the processing bandwidth is too high for a PC to handle
- When you must reduce system footprint (e.g. multiple PCs are not an option)
Develop, Deploy, and Debug Embedded Solutions with Real-Time Performance
Our general purpose programmable vision processors feature an FPGA hardware processing platform that combines ACU(Acquisition Control Unit), DTE (Data Transfer Engine) and IPU (Image Processing Unit) and state of the memory architecture. As a result, models such as our new Xcelera-CL VX4 are capable of handling variety of complex, real-time image processing topologies including iterative processing loops. While the FPGA technology provides ability to adapt to variety of high-speed, compute-intensive real-time processing applications, the Xcelera VX4 hardware design has been implemented using standard off-the-shelf components with long term availability.
Key Features
- Highly optimized memory architecture for embedded image processing
- Up to 2 x 512MB of Image memory
- Up to 4 x 32MB of image processing memory
- Extensive camera support
- User configurable Xilinx Virtex 5 FPGA
- Fully supported by Sapera APF
Product List
| Product |
Inputs |
Pixel Clock |
Host Bus |
Buffer |
Features |
| Xcelera-CL VX4 |
CameraLink |
20-85 MHz |
PCIe x8 |
2 x 512 MB |
Data Forwarding, CRC, Board sync. |
Sapera APF
Sapera APF is an integrated graphical FPGA development environment. The Sapera APF simplifies traditional FPGA development processes by combining a point and click graphical interface with FPGA based image processing libraries. Sapera APF comes bundled with a bit accurate software version of the FPGA library functions for rapid functional simulation but also automatically generates necessary infrastructure to call user functions using Sapera SDK. This powerful, yet easy to use FPGA development environment allows users to create, debug, and deploy FPGA code without ever leaving the development GUI, dramatically improving ease of development and time to deployment.
- Enables Real-time embedded image processing
- Rapid design implementation using
- Point & Click IDE
- Software-centric approach
- Extensive set of image processing functions for the FPGA
- Bit-accurate software functions permit verification of algorithm behavior
- Automatic software interface generation for user-created hardware designs
- Seamless interface to Xilinx tools
Sapera APF
Sapera APF is an integrated graphical FPGA development environment. The Sapera APF simplifies traditional FPGA development processes by combining a point and click graphical interface with FPGA based image processing libraries. Sapera APF comes bundled with a bit accurate software version of the FPGA library functions for rapid functional simulation but also automatically generates necessary infrastructure to call user functions using Sapera SDK. This powerful, yet easy to use FPGA development environment allows users to create, debug, and deploy FPGA code without ever leaving the development GUI, dramatically improving ease of development and time to deployment.
- Enables Real-time embedded image processing
- Rapid design implementation using
- Point & Click IDE
- Software-centric approach
- Extensive set of image processing functions for the FPGA
- Bit-accurate software functions permit verification of algorithm behavior
- Automatic software interface generation for user-created hardware designs
- Seamless interface to Xilinx tools
Embedded Image Processing Libraries
Sapera APF includes over 150 imaging functions in FPGA-based embedded image processing libraries, as well as bit-accurate software version of the FPGA library functions for rapid functional simulation. Sapera APF automatically generates necessary infrastructure to call user functions using Sapera SDK.
| Basic Operations |
|
Advanced Operations |
- Arithmetic operations
- Color Space Conversion
- Logic operations
- Bayer conversion
- Pixel operations
- Streams
- Neighborhood operations
- Memory access
- Statistics
- GPI/O control
- Camera I/O control
|
|
- Rotation by arbitrary angle
- Loss-less compression
- RLE
- Image compression
Upcoming Functions (1)
- Warping
- Wavelet Encoding
- Blob Analysis
- JPEG Compression
|
(1) Contact Teledyne DALSA for details
Purpose-Built to Optimize Specific Tasks
Our application-specific processors are ideally suited for embedded vision applications where intensive, real-time image processing is required. For example, Teledyne DALSA's XRI-1600™ offers PC based real-time digital image processing boards specifically engineered for demanding X-ray instrumentation and radioscopy applications.
Key Features
- Adaptive Image Averaging--reduces noise in both still and dynamic images
- Programmable Digital Filter--improves image quality and contrast
- Local Image Storage--improves reliability and processing time
- Flexiible Input Data Formats--suppports higher resolution detectors with higher bit depths (10, 12, 14, 16 bits ), CCD, CMOS, flat panel and linear
- Available in Camera Link, LVDS/RS422 interfaces
- Windows compatible C++ library for image acquisition and processor control--includes easy to use tools, utilities, and installation scripts
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Datasheet: Xcelera-CL VX4