Sapera APF is an integrated graphical FPGA development environment. Simplifying traditional FPGA development processes by combining a point and click graphical interface with FPGA based image processing libraries, Sapera APF comes bundled with a bit accurate software version of the FPGA library functions for rapid functional simulation. It also automatically generates necessary infrastructure to call user functions using Sapera SDK. This powerful, yet easy to use FPGA development environment allows users to create, debug, and deploy FPGA code without ever leaving the development GUI, dramatically improving ease of development and time to deployment.
Sapera APF not only offers extensive FPGA image processing functions but also includes libraries for image acquisition, control and auxiliary input/output controls.
Sapera APF's graphical user interface offers programming features of conventional software IDEs like on the fly program editing, single stepping, variable watches to review intermediate results, etc. and combines them with hardware design rules check and resource verification. Users interact with Xilinx tools directly from within Sapera APF to generate FPGA bit streams.
When creating custom FPGA designs, for proper software control, it is necessary to plan and implement equivalent software control functions which includes describing function prototypes and parameters. Sapera APF automates this crucial step of generating software interface for user defined FPGA designs. The user FPGA designs can thus be controlled from Sapera LT based host applications. Sapera APF also comes bundled with RTPro application allowing users to exercise their FPGA designs without having to write control application on the host.
Intuitive Graphical Programming
FPGA based Embedded Image Processing Libraries
Acquisition
FPGA processing functions
Advanced Operations
Upcoming Functions*
*Contact Teledyne DALSA Sales for availability
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