This silicon-proven IP design describes a general purpose Analog to Digital Converter (ADC) for low-power applications. The converter is a charge-redistribution successive-approximation type converter.
The key feature of this ADC is its low power consumption. This is achieved by using an energy-efficient comparator and by making all circuitry dynamic. As a result, quiescent current is avoided and the power consumption is fully proportional to the sample-rate. This property makes the ADC ideal for low duty-cycle sensor applications and other applications benefiting from low power consumption.
The converter can operate in both single-ended and differential mode, making it suitable for a broad range of applications.
The functional block diagram of the 10MS/s ADC is shown below.